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 TC9455,88F/N
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9455F,TC9455N,TC9488F,TC9488N
Digital Echo IC for Karaoke
The TC9455 series are digital echo ICs for karaoke. The ICs incorporate microphone amps and volume controllers, enabling a digital echo system to be configured on a single chip.
TC9455F TC9488F
Features
* Incorporates a two-channel microphone amp with auto level control (ALC), AD/DA converter, delay memory, and electronic volume controllers. Incorporates a 32-kHz sampling, 12-bit successive comparison AD/DA converter. Incorporates a delay memory (16-Kbit DRAM) which enables 128-ms (typ.) delay. Microphone and echo levels are controlled by built-in volume controllers. They are controlled either by DC voltage or controlled in serial by the MCU. TC9455F/N: Supports I2C bus interface TC9488F/N: Supports three-lead interface * * * The system clock is generated by the CR oscillator circuit. The echo feedback amount is configured using analog circuits. The feedback level can be freely set. The IC comes in 30-pin flat package or 24-pin shrink DIP. Weight: SSOP30-P-375-1.00: 1.08 g (typ.) SDIP24-P-300-1.78: 1.2 g (typ.)
TC9455N TC9488N
* * *
Pin Connection
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Block Diagram
System Block Diagram
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Pin Description (Note 1)
Pin Number TC9455N TC9455F TC9488N TC9488F 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 5 6 7 9 10 11 13 14 15 16 17 18 20 21 22 23 25 26 28 29 30 Symbol VDD CSCC OSCR VOL1 ( CS ) VOL2 (SCL) VOL3 (SDA) VRO VREF VDA ALC1 MC1N MC1P MC2P MC2N ALC2 VSA MCO PRIN ADIN DAOUT VOLST
TEST
I/O I I I I I I I I I I I O I I O I I O Digital supply voltage pin
Function
Remarks
Capacitor connecting pin for CR oscillator (C = 68 pF) Resistor connecting pin for CR oscillator (R = 5.6 k) When VOLST = "H" level, CS signal input pin When VOLST = "L" level, DC control pin for MIC1 volume When VOLST = "H" level, clock input pin When VOLST = "L" level, DC control pin for MIC2 volume When VOLST = "H" level, data input pin When VOLST = "L" level, DC control pin for echo volume Reference voltage pin Reference voltage pin (1/2 VDD) Analog supply voltage pin Auto level control pin 1 MIC1 feedback signal input pin MIC1 signal input pin MIC2 signal input pin MIC2 feedback signal input pin Auto level control pin 2 Analog ground pin MIC addition signal output pin Pre-filter input pin Pre-filter output signal or DC input pin Post-filter output pin Electronic volume control mode select pin 2 When VOLST = "H" level, serial control (I C bus/three-lead) When VOLST = "L" level, DC level control Test pin. Fix to "H" level for normal use Microphone echo signal output pin Digital ground pin Open drain output Open drain output
POOUT VSS
Note 1: With the TC9455F and TC9488F, pins 4, 8, 12, 19, 24, and 27 are not connected (NC pins). NC pins are normally open.
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Operation
1. Oscillator circuit
The TC9455F/N and TC9488F/N generate an internal system clock using the CR oscillator circuit. Connecting a capacitance (C) of 68 pF and a resistance (R) of 5.6 k sets the oscillator frequency to approx. 4 MHz and the sampling frequency to 32 kHz. Varying the external capacitance enables the oscillator frequency and sampling frequency for the system clock to be adjusted. Varying the system clock enables the delay time to be adjusted. Figure 1 shows the CR oscillator circuit.
1.1
How to determine oscillator frequency (f)
f [MHz] = 1532/(C [pF] x R [k]) = 1532/(68 x 5.6) 4.0 MHz (Note 2) Note 2: The oscillator frequency is a typical value (Ta = 25C). Set the resistance to between 4.7 k and 6.8 k.
1.2
How to determine sampling frequency (fs)
fs [kHz] = f/128 = 4.0/128 32 kHz
Figure 1 CR Oscillator circuit
2. Microphone amps
The IC incorporates microphone amps with auto level control (ALC). The microphone amp gain is typically 36dB. When a signal from 0 to -46dB is input, the ALC circuit can control the output signal level. Changing the external capacitor connected to the ALC circuit to a resistor sets the ALC circuit to off. Figure 2 shows the microphone amp circuit. When C = 4.7 F, the attack and release times are as follows: Attack time = Approx. 29 ms Release time = Approx. 1.6 s Setting the capacitance (C) to a smaller value enables the attack and release times to be adjusted. When the ALC circuit is not used, change the capacitor (*1) to a resistor (approx. 10 k), and connect to GND line. At power on, while the capacitor is being charged, no sound is output. So, use a capacitance of 4.7 F or less.
Figure 2 Microphone amp with ALC
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3. AD/DA converter and digital delay circuit
The AD/DA converter is a 12-bit successive comparison type. The sampling frequency when the system clock operates at 4 MHz is 32 kHz. The analog signal input from the AD converter is converted to 12-bit digital data. The digital delay circuit compresses the 12-bit signal to 4-bit, writes it to delay RAM, then reads it. The 4-bit data read from delay RAM is de-compressed to 12-bit. The 12-bit data are converted to analog signals by the DA converter and output. The area for delay RAM memory is 4096 words x 4 bits. The echo delay time is 4096 words x (1/32 kHz) = 128 ms. Figure 3 is a block diagram of the echo circuit.
Figure 3 Block diagram of echo circuit
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4. Electronic volume controllers
The IC incorporates microphone input 1 (MIC1) and microphone input 2 (MIC2) volume and echo volume controllers. The built-in volume controller operates in 16 steps. Using an external variable resistor, volume can be controlled by the DC level or from the MCU using serial data. The TC9455F/N supports an I2C bus interface; the TC9488F/N, a three-lead interface.
4.1
Serial control timing
Figure 4 shows the serial control timing.
Figure 4 Serial control timing
Table 1 lists bits used to set the volume.
Table 1 Volume setting bits
MODE VOL1 setting VOL2 setting VOL3 setting VOL1, 2, 3 setting DA7 M3 M3 M3 M3 DA6 M2 M2 M2 M2 DA5 M1 M1 M1 M1 DA4 M0 M0 M0 M0 DA3 0 0 1 1 DA2 0 1 0 1 DA1 0 0 0 0 DA0 0 0 0 0
M3, M2, M1, M0: Volume setting data
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4.2 Setting of microphone and echo volumes
Table 2 lists the microphone setting values and attenuation; Table 3 lists the echo volume setting values and attenuation. The DC level settings are typical values.
Table 2 Microphone volume (VOL1, VOL2) attenuation
DC Level Setting (V) 5.0 4.4 4.2 3.9 3.7 3.5 3.2 3.0 2.7 2.5 2.3 2.0 1.8 1.5 1.3 1.1 0.0 M3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Serial Data Setting Attenuation (dB) M2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 M1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 M0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -
Table 3 Echo volume (VOL3) attenuation
DC Level Setting (V) 5.0 4.4 4.2 3.9 3.7 3.5 3.2 3.0 2.7 2.5 2.3 2.0 1.8 1.5 1.3 1.1 0.0 M3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Serial Data Setting Attenuation (dB) M2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 M1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 M0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -
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Maximum Ratings (Ta = 25C)
Characteristics Supply voltage Input voltage Power dissipation Operating temperature Storage temperature Symbol VDD Vin PD Topr Tstg Rating -0.3~6.0 -0.3~VDD + 0.3 TC9455/88F TC9455/88N -25~85 -55~150 200 300 Unit V V mW C C
Electrical Characteristics (unless otherwise specified, Ta = 25C, VDD = 5.0 V)
DC characteristics
Characteristics Operating supply voltage Operating supply current Operating frequency Power-on reset voltage "H" level Input voltage "L" level Input current "H" level "L" level VIL IIH IIL Symbol VDD IDD Fmck Vpor VIH Test Circuit Test Condition Ta = -25~85C Fmck = 4 MHz fs = 32 kHz typ. Min 4.5 VDD x 0.8 0 -1.0 Typ. 5.0 20 4.0 4.0 Max 5.5 30 4.25 VDD VDD x 0.2 1.0 V Unit V mA MHz V
A
Volume control (when VOLST = "L")
Characteristics Hysteresis voltage Input step width Min level input voltage Max level input voltage Symbol VH VST VImin VImax Test Circuit Test Condition Min 4.95 Typ. 0.12 0.26 1.1 4.8 Max 0.8 Unit V V V V
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AC Characteristics Microphone amps and volumes
Characteristics Microphone amp gain MCO Output at ALC Operation Maximum Input at No ALC Operation Maximum Input 1 at ALC Operation Symbol MICG VM VL VA1 Test Circuit Test Condition Input 1-kHz sine wave, -50dBV, MCO pin measured. Input 1-kHz sine wave, -25dBV. Input 1-kHz sine wave. Input 1-kHz sine wave. MCO output clip limit vale at max volume Input 1-kHz sine wave. MCO output clip limit value at microphone amp output point VOL1~3: min VOL1: max, VOL2: min, VOL3: min VOL1: min, VOL2: max, VOL3: min VOL1: min, VOL2: min, VOL3: max VOL1: max, VOL2: max, VOL3: min VOL1: max, VOL2: min, VOL3: min VOL1: min, VOL2: max, VOL3: max VOL1~3: max Ratio with one level higher (excluding the minimum level) Ratio with one level higher (excluding the minimum level) 1 kHz Sine wave input, -20dBV -10dBV 1 kHz Sine wave input, -10dBV -20dBV C = 47 F (Note 3) C = 0.47 F (Note 3) C = 47 F (Note 3) C = 0.47 F (Note 3) Min 47.5 -0.8 Typ. 49.5 1.7 -47.5 -4.0 Max 51.5 3.2 Unit dBV dBV dBV dBV
Maximum Input 2 at ALC Operation POOUT output noise 1 POOUT output noise 2 POOUT output noise 3 POOUT output noise 4 POOUT output noise 5 POOUT output noise 6 POOUT output noise 7 POOUT output noise 8 Volume 1, 2 attenuation Volume 3 attenuation
VA2 NO1 NO2 NO3 NO4 NO5 NO6 NO7 NO8 ATT1 ATT2


6.5 -90 -63 -64 -65 -60 -62 -62 -59 -2.0 -1.0 120 10 1.6 0.15
-85 -58 -59 -54 -54 -54 -54 -52
dBV dBV dBV dBV dBV dBV dBV dBV dBV dB dB
Attack time
TATK
ms s
Release time
TRLS
Note 3: External capacitor of ALC pin
Microcontroller interface (when VOLST = "H")
Characteristics Interface setup time Shift clock "L" duration Shift clock "H" duration Data setup time Data hold time Interface hold time
CS "H" duration
Symbol tIFS tL tH tDS tDH tIFH tCSH
Test Circuit
Test Condition (Note 4)
Min 0.25 0.25 0.25 0.25 0.25 (Note 4) (Note 4) 1.0 0.25
Typ.
Max
Unit s s s s s s s
Note 4: With TC9488F and TC9488N
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AC Characteristics Test Points
1. TC9488F/N three-lead interface
2. TC9455F/N I C bus interface
2
Purchase of TOSHIBA I2C components conveys a license under the Phillips I2C Patent Right to use the components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Phillips.
tIFS tL tH tDS tDH tIFH tCSH > > > > > > > 0.25 s 0.25 s 0.25 s 0.25 s 0.25 s 1.0 s 0.25 s interface setup time shift clock L time shift clock H time data setup time data hold time interface hold time CS signal H duration
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TC9455/88F AC Test Circuit
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Package Dimensions
Weight: 1.08 g (typ.)
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Package Dimensions
Weight: 1.2 g (typ.)
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RESTRICTIONS ON PRODUCT USE
000707EBA
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs,p lease ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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